Commit f902ca3d by John Chodera (MSKCC)

Updated .travis.yml and test build.

parent da0fa01c
...@@ -61,7 +61,8 @@ def test_build(): ...@@ -61,7 +61,8 @@ def test_build():
app.PDBFile.writeFile(fixer.topology, fixer.positions, outfile) app.PDBFile.writeFile(fixer.topology, fixer.positions, outfile)
infile.close() infile.close()
outfile.close() outfile.close()
print "Done." print "Done."fg
# Delete input file. # Delete input file.
os.remove(input_pdb_filename) os.remove(input_pdb_filename)
......
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