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  1. 09 Jun, 2022 1 commit
  3. 08 Jun, 2022 2 commits
    • Add documentation on optional flags to the flags library overview. · e0a32c2a 
      PiperOrigin-RevId: 453766125
Change-Id: Id4d88ae20bdadc960a65bc1010eea746f1eba051
      Tom Manshreck committed
    • absl: correct the stack trace path on RISCV · 7a8d20b7 
      When we would perform a stacktrace using the frame pointer walking, because we
did the adjustment for the return address separately, we were misaligning the
stack size and frame.  Simplify the logic and correct the offset.

The recovered frame pointer provides us with the return address of the current
frame and the previous frame's frame pointer.  Subsequently, we decide if we
want to record this frame or not.  The value in `next_frame_pointer` already
points to the value from the previous stack frame (that is the next frame
pointer to iterate).  As such, the value computed by `ComputeStackFrameSize` is
the value for the current frame.  This was offset by one previously.

Take the opportunity to clean up some of the local comments, fixing typos and
splitting up the comments to reflect the lines that they are associated with.

PiperOrigin-RevId: 453744059
Change-Id: If14813e0ac36f327f4b7594472f2222d05c478aa
      Saleem Abdulrasool committed
  5. 07 Jun, 2022 2 commits
  7. 06 Jun, 2022 8 commits
  9. 03 Jun, 2022 1 commit
  11. 02 Jun, 2022 5 commits
  13. 31 May, 2022 9 commits
  15. 27 May, 2022 3 commits
  17. 26 May, 2022 3 commits
    • Enable __thread on Asylo · 89cdaed6 
      PiperOrigin-RevId: 451201387
Change-Id: Ibeac4f24d00e28bbfc61e476936d669321a2cb24
      Abseil Team committed
    • Add implementation of is_invocable_r to absl::base_internal for C++ < 17, define… · 0bc4bc23 
      Add implementation of is_invocable_r to absl::base_internal for C++ < 17, define it as alias of std::is_invocable_r when C++ >= 17

PiperOrigin-RevId: 451171660
Change-Id: I6dc0e40eabac72b82c4a19e292158e43118cb080
      Dino Radakovic committed
    • Optimize SwissMap iteration for aarch64 by 5-6% · 591a2cda 
      Benchmarks: https://pastebin.com/tZ7dr67W. Works well especially on smaller ranges.

After a week on spending optimizing NEON SIMD where I almost managed to make hash tables work with NEON SIMD without performance hits (still 1 cycle to optimize and I gave up a little), I found an interesting optimization for aarch64 to use cls instruction (count leading sign bits).

The loop has a property that ctrl_ group is not matched against count when the first slot is empty or deleted.

```
void skip_empty_or_deleted() {
      while (IsEmptyOrDeleted(*ctrl_)) {
        uint32_t shift = Group{ctrl_}.CountLeadingEmptyOrDeleted();
        ctrl_ += shift;
        slot_ += shift;
      }
      ...
}
```

However, `kEmpty` and `kDeleted` have format of `1xxxxxx0` and `~ctrl & (ctrl >> 7)` always sets the lowest bit to 1.

In naive implementation, it does +1 to start counting zero bits, however, in aarch64 we may start counting one bits immediately. This saves 1 cycle and 5% of iteration performance.

Then it becomes hard to find a supported and sustainable C++ version of it.

`__clsll` is not supported by GCC and was supported only since clang 8, `__builtin_clrsb` is not producing optimal codegen for clang. `__rbit` is not supported by GCC and there is no intrinsic to do that, however, in clang we have `__builtin_bitreverse{32,64}`. For now I decided to enable this only for clang, only if they have appropriate builtins.

PiperOrigin-RevId: 451168570
Change-Id: I7e9256a60aecdc88ced4e6eb15ebc257281b6664
      Abseil Team committed
  19. 25 May, 2022 1 commit
  21. 24 May, 2022 1 commit
  23. 23 May, 2022 2 commits
  25. 20 May, 2022 2 commits